Zoran Salcic
Professor of
Computer Systems Engineering
Fellow Royal Society New Zealand
Contact Address:
Email: z.salcic@auckland.ac.nz
I have been working in the area of computer
systems engineering since 1972 when I received Dipl.Ing. degree and, then, ME
degree in 1974 and PhD degree in 1976 all from Sarajevo University. I spent
some wonderful time at CCNY of CUNY New York in 1974 and 1975, which helped me
understand fundamentals of computing and coming technology development. Personally
I was lucky to live in the era and be active participant of microprocessor and
then of field-programmable logic (r)evolutions since their very beginnings. It
helped me understand the issues, potentials and trends in all important areas
of hardware and software of digital systems, relationships between hardware and
software, their limitations and potentials. I have been involved in numerous
research and development projects and enjoyed all the time working in academic
world with young and bright people, but also in industrial research environment
that showed me life on the other side of the fence. During that period I
published, together with my colleagues and students, more than 200 research
papers, several tens of technical reports, seven books and supervised more than
200 undergraduate and more than 100 students in their postgraduate studies. At
the same time it was most challenging and most rewarding activity, because most
of them learned something from me and I from them. I am proud of being professor
at Sarajevo University first, then at the University of Auckland, where I moved
in 1994 and hold the chair in computer systems engineering, but also as the
visiting professor at Czech Technical University Prague (1993-94), Technical
University Vienna (2002) and at the Friedrich-Alexander University
Erlangen-Nuremberg which is hosting me as the recipient of the prestigious
Humboldt research award for the whole 2010. Computing machines became my
passion and love because they are the most complex systems men ever created.
Research
Areas
My research has had several distinctive
periods, but it was not unusual to go several years back and pick up some of
the ideas which stayed well behind. Recently, my research has focused on the
following areas, which most often intertwine:
·
Embedded
Systems
·
Hardware-Software
Co-Design
·
System-Level
Design – Models of Computation and Languages
·
Execution
Platforms for Reactive and Real-Time Systems
·
Novel
Embedded and Real-Time Systems Applications
·
Ad-Hoc
Collaborative and Cyber-Physical Systems
·
Adaptive
Computing Systems
·
Optoelectronic
Computing
It is generally relationships of high-level
specification mechanisms and languages with the execution platforms, which
links different levels of abstraction in computing in consistent way. I focus
on embedded computing, although some of the most recent results are applicable
to general computing platforms, as well. From this reason, as an engineer, I
always liked challenging applications which are the best motivation for results
that can be then generalized. One small exception is the path which I have
taken with special passion in the last four years and deals with the new ways
of implementing computer logic using light for both computation and
communication on silicon chips.
Most of my research is done within Embedded Systems
Research group with numerous colleagues and students
participating and contributing. Exciting and challenging is our current effort
to develop business activity around our core research on system level
programming languages and tools, particularly SystemJ
language and Function Block
IEC 61499 standard.
For almost four decades I have been teaching
courses which range from digital systems design, computer organization and
design, hardware description languages, computer architecture, microprocessors
and their applications, to embedded systems design and languages for concurrent
programming, real-time operating systems, process control etc. I always
especially liked students’ hands-on experience and involvement into projects of
various scale. Project-based teaching and learning has been always the backbone
of all courses I have been involved in. Currently my teaching is focused on the
following areas:
·
Digital
Systems Design
·
Field-Programmable
Logic and (Re)configurable Systems
·
Systems on
Programmable Chips
·
Hardware
Description Languages
·
Embedded
Systems Design and System Level Programming/specification Languages
·
Real-Time
Operating Systems
The list
below represents selected recent publications. More detailed list of selected
publications can be found here.
Books
Z. Salcic, A. Smailagic, Digital Systems Design and Prototyping Using
Field Programmable Logic and Hardware Description Languages, Kluwer
Academic Publishers, Second Edition, September 2000, 648 pp.
Z. Salcic, VHDL and FPLDs in Digital Systems Design, Prototyping and Customization,
Kluwer Academic Publishers, Boston, March 1998, 576 pp.
Z. Salcic and A. Smailagic, Digital Systems Design and Prototyping Using
Field Programmable Logic, Kluwer Academic Publishers, Boston, June 1997,
368 pp.
Journal
Publications
A. Malik, Z.
Salcic, P. S. Roop and A. Girault. SystemJ:
A GALS Language for System Level Design, Journal of Computer
Languages, Systems & Structures, COMLAN, Elsevier, to appear, doi: 10.1016/j.cl.2010.01.001, 2010
I. Radojevic, Z. Salcic, P. Roop: Design of Heterogeneous Embedded
Systems in DDFCharts, IEEE Transactions on Parallel and Distributed Systems, to appear,
p-, 2010
K.I. Wang, W.H. Abdulla, Z. Salcic: Ambient intelligence platform using
multi-agent system and mobile ubiquitous hardware, Pervasive and Mobile Computing Journal,
5, (5),
p558-573, 2009, doi:10.1016/j.pmcj.2009.06.003
O. Cheng, W.H. Abdulla, Z. Salcic: Hardware-Software Co-Design of
Automatic Speech Recognition System for Embedded Real-Time Applications, IEEE Transactions
on Industrial Electronics, 56, p-, 2009
Z. Salcic, Y. Wu, S.K. Nguang: An Improved Taylor Method for Frequency
Measurement in Power Systems, IEEE Transactions on Instrumentation and Measurement, 50,
p3288-3294, 2009
S. Yuan, L.H. Yoong, S. Andalam, P. Roop, Z. Salcic: A new multithreaded
architecture supporting direct execution of Esterel, EURASIP Journal on
Embedded Systems, 2009, p-, 2009,
A. Malik, Z. Salcic, P. Roop: SystemJ Compilation using the Tandem Virtual
Machine Approach, ACM Transactions on Design Automation of Electronic Systems,
14, (3),
p-, 2009
L.H. Yoong, P. Roop, V. Vyatkin, Z. Salcic: A synchronous approach
for IEC 61499 function block implementation, IEEE Transactions on Computers, 58, (12),
p1599-1614, 2009
S. Yuan, S. Andalam, L. H. Yoong, P. Roop, and Z. Salcic, "STARPro —
a new multithreaded direct execution platform for Esterel," in Model-driven
High-level Programming of Embedded Systems (SLA++P'08), Budapest, Hungary,
April 2008., p10., also in Electronic Notes In Computer Science, December 2008
Z. Salcic, G. Coghill and B. Maunder: A Genetic Algorithm High-Level
Optimizer for Complex Datapath and Data-Flow Digital Systems, Journal of
Applied Softcomputing: Elsevier, Volume 7,
Issue 3, June 2007, Pages 979-994
V. Vyatkin, Z. Salcic, P. Roop, J. Fitzgerald, Information
Infrastructure of Intelligent Machines based on IEC61499 Architecture, IEEE Industrial
Electronics Magazine, vol. 1, No. 4, 2007
R. Duraisamy, Z. Salcic, M. A. Strangio, M. Morales-Sandoval: Supporting
symmetric 128-bit AES in Networked Embedded Systems: an Elliptic Curve Key
Establishment Protocol-on-Chip (PoC), EURASIP Journal on Embedded Systems, ID
65751, doi:10.1155/2007/65751, p.9
Z. Salcic, G. Coghill and B. Maunder: A Genetic Algorithm High-Level
Optimizer for Complex Datapath and Data-Flow Digital Systems, Journal of
Applied Softcomputing: Elsevier, Volume 7,
Issue 3, June 2007, Pages 979-994
Z. Salcic, S. Berber, P. Secker, FPGA Prototyping of RNN Decoder for
Convolutional Codes, accepted, EURASIP Journal of Applied Signal Processing,
accepted, doi:10.1155/ASP/2006/15640, 9 pages, 2006
Z. Salcic, D. Hui, P. Roop, M. Biglari-Abhari, HiDRA – A Reactive
Multiprocessor Architecture for Heterogeneous Embedded Systems, Elsevier Journal of Microprocessors and
Microsystems, Vol. 30, Issue 2, pp. 72-85, 2006
G. Wang, Z. Salcic, M. Biglari-Abhari, Customising Multiprocessor
Implementation of an Automated Video Surveillance System, EURASIP Journal on Embedded Systems, doi:10.1155/ES/2006/45758, 12
pages, 2006, pp. 1-12
A. Bigdeli, M. Biglari-Abhari and Z. Salcic, A New Pipelined Systolic
Array-Based Architecture for Matrix Inversion in FPGAs with Kalman Filter Case Study, EURASIP
Journal on Applied Signal Processing, doi:10.1155/ASP/2006/89186, 12 pages,
2006
M. Matosevic, Z. Salcic, S. Berber: A Comparison of Accuracy Using a GPS
and a low-cost DGPS, IEEE Transaction on
Instrumentation and Measurement, vol. 55, no. 5, pp. 1677-1683, 2006
I. Radojevic, Z. Salcic, P. Roop, Modelling Heterogeneous Embedded
Systems: From SystemC and Esterel to DFCharts, IEEE Design and Test of Computers, pp. 348-358, September-October,
2006
Z. Salcic, J. Cao and S. K. Nguang, A
Floating-point FPGA-based Self-Tuning Regulator, IEEE Transactions on Industrial Electronics, Vol. 53,
Issue 2, April 2006 Page(s):693 – 704
R. von Hanxleden, X. Li,
P. Roop, Z. Salcic and L. Yoon, Reactive Processing for Reactive Systems, ERCIM (European Consortium for Informatics and
Mathematics) News, no.67, 2006, pp. 30-31
S. Berber, P. Secker, Z. Salcic, Theory
and Application of Neural Networks for 1/n Rate Convolutional Decoders, Engineering Applications of Artificial
Intelligence, Elsevier, 18, 2005, pp. 931-949
W. To, Z. Salcic,
S. K. Nguang, Prototyping Neuro-adaptive Smart Antenna for 3G Wireless Communications,
EURASIP Journal on Applied Signal
Processing, vol 7, pp.1093-1109, 2005
I.Radojevic, Z. Salcic, P. Roop, A New
Model for heterogeneous embedded systems – what Esterel/Syncharts need to
become a suitable specification platform, accepted for publication in International Journal on Software
Engineering and Knowledge Engineering, Vol. 15, No.2, 2005, pp. 405-410
Z. Salcic,
P. Roop, M. Biglari-Abhari, A. Bigdeli, REFLIX: A Processor Core with Native
Support for Control Dominated Embedded Applications, Elsevier Journal of Microprocessors and Microsystems , Vol 28,
pages 13-25, 2004
Z. Salcic:
“ISDE – An Integrated Systems Development Environment for Custom-Computing
Machines Implemented in FPLDs” , Elsevier Journal on Microprocessors and Microsystems, 25
(9-10) (2002) pp. 427-435
Z. Salcic: “High-speed Customizable Fuzzy-Logic
Processor: Architecture and Implementation”, IEEE Transaction on Man,
Systems and Cybernetics, , Vol. 31, No. 6 , Nov. 2001, pp. 731 –737
Z.
Salcic: “GSM Mobile Station Location Using Reference Stations and Artificial
Neural Networks”, Journal of Wireless
Personal Communications, Kluwer Academic Publishers, vol. 19, no.3,
December 2001, pp. 205-226
Z. Salcic and C.R. Lee:
“Scalar-based Direct Algorithm Mapping FPLD Implementation of a Kalman Filter”,
IEEE Trans. On Aerospace and Electronic
Systems, Vol. 36, No 3, 2000, pp. 879-888
Z. Salcic and C.R. Lee:
“Scalar-based Direct Algorithm Mapping FPLD Implementation of a Kalman Filter”,
IEEE Trans. On Aerospace and Electronic
Systems (in Press, to appear 7/2000)
J. Danecek, F. Drapal, A. Pluhacek, Z. Salcic, M.Servit "DOP - A simple processor for custom computing machines”, Journal of Microcomputer Applications Vol. 17, (1994), p. 239-253. ISSN 0745-7138
Chapters in Books
E. Akeila, Z. Salcic, A. Swain: A New Algorithm for Direct Gravity
Estimation and Compensation in Gyro-Based and Gyro-Free INS applications, In:
Subhas Chandra Mukhopadhyay, Gourab Sen Gupta and Ray Yueh-Min Huang (ed.), Recent Advances in Sensing Technology.,
Lecture Notes in Electrical Engineering, LNEE, Springer, p.203-219, 2009
K. Wang, W. H. Abdulla, and Z. Salcic, “Multi-agent System with Hybrid
Intelligence Using Neural Network and Fuzzy Inference Techniques”, H. G. Okuno
and M. Ali et al. (Eds.): IEA/AIE 2007, LNAI 4570, Springer, 2007, pp.
0473-0482
IK. Wang, W. H. Abdulla, and Z. Salcic, “Multi-agent Software Control
System with Hybrid Intelligence”, Indulska et al. (Eds.): UIC 2007, LNCS 4611,
Springer, 2007, pp. 1046-1055.
K.
Wang, W. Abdulla, Z. Salcic, Distributed
embedded intelligence room with multi-agent cooperative learning, Lecture
Notes in Computer Science (including subseries Lecture Notes in Artificial
Intelligence and Lecture Notes in Bioinformatics), v 4159 LNCS, Ubiquitous
Intelligence and Computing - Third International Conference, UIC 2006,
Proceedings, 2006, p 147-156
F. Gruian, Z. Salcic, Designing a Concurrent Hardware
Garbage Collector for Small Embedded Systems, pp. 281 – 294, Advances in Computer
Systems Architecture: 10th Asia-Pacific Conference, ACSAC 2005, Singapore,
October 24-26, 2005. Proceedings Editors: Thambipillai Srikanthan,
Jingling Xue, Chip-Hong Chang ISBN: 3-540-29643-3, Lecture Notes in
Computer Science, Springer, vol. 3740, 2005, pp. 281 – 294
L.
Yang, M. Biglari-Abhari and Z. Salcic, An Energy-efficient Processor Core for
Reactive Embedded Applications, Advances in Computer Systems Architecture: 10th Asia-Pacific Conference,
ACSAC 2005, Singapore, October 24-26, 2005. Proceedings Editors:
Thambipillai Srikanthan, Jingling Xue, Chip-Hong Chang
ISBN: 3-540-29643-3, Lecture Notes in Computer Science, Springer, vol. 3740, 2005
pp. 131 - 142
Z. Salcic,
P. Roop, M. Biglari-Abhari, A. Bigdeli: “REFLIX: A Processor Core for Reactive
Embedded Applications”, Lecture Notes in
Computer Science, Volume 2438, pp
0945-0954, Springer 2002
B. Maunder,
Z. Salcic, G. Coghill: “High-level Hierarchical
B. Maunder,
Z. Salcic, G. Coghill : “FPLD
Z. Salcic, B. Maunder “SimP - A
Core for FPLD-Based Custom-Configurable Processors”, in Proceedings of the 2nd International Conference on ASIC, Scientific
and Technological Literature Publishing House, Shanghai, 1996, pp 197-201
Z. Salcic,
B. Maunder “CCSimP - an
Instruction-level Custom-Configurable Processor for FPLDs” , in Field-Programmable Logic
Conference Publications
W. T. Sun, Z. Salcic, A. Malik: LibGALS: A Library for GALS
Systems Design and Modeling, Proceedings of Asia-Pacific Design Automation
Conference, Taipei, January 2010, to appear
S.H.A. Naqvi, S. Berber, Z. Salcic: Performance Analysis of
Collaborative Communication in the Presence of Phase Errors and AWGN in
Wireless Sensor Networks', International
Conference on Wireless Comm. and Mobile Computing, Leipzig, June, 2009, p.394-398
A. Malik, Z. Salcic, A. Girault, A.Walker, S.L. Lee: A customizable multiprocessor
for Globally Asynchronous Locally Synchronous execution, 7th International Workshop on Java Technologies for Real-Time and
Embedded Systems, ACM Proceedings of
the 7th International Workshop on Java Technologies for Real-Time and Embedded
Systems, Madrid, 23-25 September, 2009, p.120-129
R. Sinha, P.
Roop, S. Basu, Z. Salcic: Multi-Clock SoC Design using Protocol Conversion, Design Automation
and Test in Europe (DATE), Nice, France, 20 - 24 April, 2009
L.H. Yoong, P. Roop, Z. Salcic: Efficient
implementation of IEC 61499 function blocks', IEEE International Conference on
Industrial Technology (ICIT), Melbourne, 10 - 13 February, 2009
Y. He, M. Biglari-Abhari, Z. Salcic: Rapid Energy Estimation for Embedded
Soft-Core Microprocessors, International Conference on Embedded Systems and Applications (ESA'09),
Las Vegas, Nevada,
USA, 13 - 16 July, 2009
G. D. Shaw, L.H. Yoong, P. Roop, Z. Salcic: Model-driven Approach for Complex
Material Handling Systems, 13th IFAC Symposium on Information Control Problems in Manufacturing,
Moscow,
3-5 June,
2009
A. Malik, Z. Salcic and P.
S. Roop, Tandem Virtual Machine – An Efficient Execution Platform for GALS
Language SystemJ, Asia-South Pacific Conference on Computer Architecture, 2008,
p.1-8
E. Akeila, Z. Salcic and A. Swain, Direct
Gravity Estimation and Compensation in Strapdown INS Applications,
International Conference on Sensor Technologies, ICST, Taiwan, Nov. 2008, IEEE
Proceedings of the conference, p.6
E. Akeila, Z. Salcic, A. Swain, Implementation,
Calibration and Testing of GFINS Models Based on Six-Accelerometer Cube, IEEE
TENCON, November 2008, Hyderabad, November, to be published in IEEE Conference
Proceedings, p.6
R. Sinha, P. Roop, S. Basu, S, Z. Salcic, 'A
Module Checking based Converter Synthesis Approach for SOCs', IEEE
International Conference on VLSI Design, Proceedings of VLSI Design,
Hyderabad, India, 6th to 8th January 2008, 2008, p.492-501
Radojevic,
Z.Salcic, P.Roop, McCharts and Multiclock FSMs for Modelling large scale
Systems, Memocode 2007
L. Yoong, P. Roop, V. Vyatkin,
Z.Salcic, Synchronous Execution of IEC 61499 Function Blocks Using Esterel, 5th
IEEE International Conference on Industrial Informatics INDIN 2007, Vienna 2007
F.Chen, Z.Salcic: Analysis of photo-elastic modulation in acceleration
sensing, Proceedings of IEEE Sensors Conference, Atlanta, IEEE Press, 2007
K. I.-K. Wang, I. Y.-H. Chen, W. H. Abdulla, Z. Salcic, and B. Wuensche, 3D
Virtual Interface for Ubiquitous Intelligent Environments? in Proceedings of
3rd IET International Conference on Intelligent Environments, Ulm, Germany,
2007, pp. 268-275.
W.T. Sun, Z. Salcic, Modeling RTOS for Reactive Embedded Systems, 20th
IEEE VLSI Conference, Bangalore India, 2007
F. Gruian, P. Roop, Z. Salcic, I. Radojevic, SystemJ Approach to
system-level Design, Proceedings of Methods and Models for Co-Design
Conference, Memocode 2006, Napa Valey California, 2006, (IEEE Cat. No. 06EX1398). IEEE. 2006, pp. 149-58.
Piscataway, NJ, USA
I. Radojevic, Z. Salcic, P. Roop, Design
of heterogeneous embedded systems using DFCharts model of computation, 19th
IEEE VLSI Conference, Hayderabad India, Jan 2006, IEEE Proceedings of the
Conference, 461 – 464
L.H. Yoon, P.R oop, Z. Salcic, F. Gruian, Compiling Esterel for Direct
Execution, Proceedings of the Conference on Synchronous Languages, Applications
and Programming, SLAP 2006, Vienna, March 2006, will be published also in Electronic
Notes on Computer Scinece (ENCS)
Z. Salcic, F. Gruian, P. Roop, A. Wahid, A
scheduler
R.
Duraisamy, Z. Salcic, M.
Morales-Sandoval, C. Feregrino-Uribe, A
fast elliptic curve based key agreement protocol-on-chip (PoC) for securing
networked embedded systems, 12th IEEE
International Conference on Embedded and Real-Time Computing Systems and
Applications. IEEE Comput. Soc. 2006, pp. 154-161,. Los Alamitos, CA, USA.
K. I.
Wang, W. H. Abdulla, and Z. Salcic, “Multi-agent fuzzy inference control system
for intelligent environments using
F.
Chen, Z. Salcic, J.H Wang, A Novel Optical Waveguide Based Accelerometer,
Proceedings of Nanotechnology Conference, 2006, Boston USA
F.
Chen, Z. Salcic, J.H Wang, Modelling and Performance Evaluation of a Novel
Optical Accelerometer, Proceedings of Asia-Pacific Optical Communication
Conference, APOC 2006,
M.
W. Sajeewa Dayaratne, Partha S Roop,
Zoran Salcic Direct Execution of Esterel Using Reactive Microprocessors,
accepted for Synchronous languages, Applications and Programming, SLAP 05,
Edinburgh, April 05
I.K. Wang, W. Abdulla and Z. Salcic, A Multi-Agent
System for Intelligent Environments using
Ivan Radojevic, Zoran Salcic and
Z.Salcic, D. Hui, P. Roop and M. Biglari-Abhari, REMIC – Design of a
Reactive Embedded Microprocessor Core, Asia-South Pacific Design Automation
Conference, Shanghai, January 2005
M. Savage,Z. Salcic,G. Coghill,G. Covic, Extended Genetic Algorithm for Codesign Optimization of DSP Systems in
FPGAs, IEEE International Conference on Field-Programmable Technology
FPT-04, Brisbane, Australia, 6-8 December, pages n/a, 2004
P. Roop,Z. Salcic,S. Dayaratne, Towards
Direct Execution of Esterel Programs on Reactive Processors, EMSOFT'04, Pisa
Italy, September 27-29, 2004
Z.
Salcic, Prototyping DSP Embedded Systems – Requirements, Design flows,
examples, 12th European Conference on Signal Processing, Vienna, Invited paper,
September, 2004,
Z. Salcic,P. Roop, D. Hui,I. Radojevic,
HiDRA: A New Architecture for Heterogeneous Embedded Systems, Embedded Systems
and Applications
Z. Salcic,P. Roop, Customizing Processor
Cores to Support Reactivity, Engineering Reconfigurable Systems Architectures,
Las Vegas, June, 2004
P. Roop,Z. Salcic,M. Biglari-Abhari,A.
Bigdeli, A New Reactive Processor with Architecture Support for Control
Dominated Embedded Systems, IEEE International Conference on VLSI Design, n/a,
January, 2003
P.Roop,
Z.Salcic, M.Biglari-Abhari, A.Bigdeli: “A
New Reactive Processor with Architectural Support for Control Dominated
Embedded Systems”, The sixteenth
International Conference on VLSI Design, VLSI 2003, New Delhi, January
2003
Department of Electrical & Computer Engineering
Faculty of Engineering